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ltc2904/ltc2905 1 29045fa features typical applicatio u descriptio u monitors two inputs simultaneously nine threshold combinations three supply tolerances (5%, 7.5%, 10%) guaranteed threshold accuracy: 1.5% of monitored voltage over temperature internal v cc auto select power supply glitch immunity 200ms reset time delay (ltc2904 only) adjustable reset time delay (ltc2905 only) open drain rst output guaranteed rst for v1 1v or v2 1v low profile (1mm) sot-23 (thinsot tm ) and plastic (3mm x 2mm) dfn packages desktop and notebook computers handheld devices network servers core, i/o monitor precision dual supply monitors with pin-selectable thresholds the ltc 2904/ltc2905 are dual supply monitors in- tended for systems with two supply voltages. the dual supply monitors have a common reset output with delay (200ms for the ltc2904 and adjustable using an external capacitor for the ltc2905). this product provides a precise, space-conscious and micropower solution for supply monitoring. the ltc2904/ltc2905 feature a tight 1.5% threshold accuracy over the whole operating temperature range, and glitch immunity to ensure reliable reset operation without false triggering. the open drain rst output is guaranteed to be in the correct state for inputs down to 1v. the ltc2904/ltc2905 also feature three programming input pins, which program the threshold and tolerance level without requiring any external components. these three programming pins provide a total of 27 different voltage level and tolerance combinations, eliminating the need to have different parts for development and implementation of different systems with different voltage levels requiring monitoring function. , ltc and lt are registered trademarks of linear technology corporation. v1 s1 s2 tol v2 tmr gnd rst ltc2905 22nf 0.1 f 0.1 f dc/dc converter system logic 29045 ta01 3.3v 5v 5v, 3.3v dual supply monitor with 5% tolerance table 1. voltage threshold programming v1 v2 s1 s2 5.0 3.3 v1 v1 3.3 2.5 open gnd 3.3 1.8 v1 open 3.3 1.5 open v1 3.3 1.2 open open 2.5 1.8 gnd gnd 2.5 1.5 gnd open 2.5 1.2 gnd v1 2.5 1.0 v1 gnd applicatio s u thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners.
ltc2904/ltc2905 2 29045fa terminal voltages v1, v2 ..................................................... 0.3v to 7v s1, s2, tol .............................. 0.3v to (v cc +0.3v) rst ......................................................... 0.3v to 7v rst (ltc2904) ....................................... 0.3v to 7v tmr (ltc2905) ...................................... 0.3v to 7v order part number ddb8 part marking t jmax = 125 c, ja = 76 c/w lbcz lbdb lajf lbcy absolute axi u rati gs w ww u package/order i for atio uu w (notes 1, 2) electrical characteristics the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v1 = 2.5v, v2 = 1v, s1 = tol = v1, s2 = 0v, unless otherwise noted. (notes 2, 3, 4) symbol parameter conditions min typ max units v rt50 5v, 5% reset threshold v1 input threshold 4.600 4.675 4.750 v 5v, 7.5% reset threshold 4.475 4.550 4.625 v 5v, 10% reset threshold 4.350 4.425 4.500 v v rt33 3.3v, 5% reset threshold v1, v2 input threshold 3.036 3.086 3.135 v 3.3v, 7.5% reset threshold 2.954 3.003 3.053 v 3.3v, 10% reset threshold 2.871 2.921 2.970 v v rt25 2.5v, 5% reset threshold v1, v2 input threshold 2.300 2.338 2.375 v 2.5v, 7.5% reset threshold 2.238 2.275 2.313 v 2.5v, 10% reset threshold 2.175 2.213 2.250 v v rt18 1.8v, 5% reset threshold v2 input threshold 1.656 1.683 1.710 v 1.8v, 7.5% reset threshold 1.611 1.638 1.665 v 1.8v, 10% reset threshold 1.566 1.593 1.620 v v rt15 1.5v, 5% reset threshold v2 input threshold 1.380 1.403 1.425 v 1.5v, 7.5% reset threshold 1.343 1.365 1.388 v 1.5v, 10% reset threshold 1.305 1.328 1.350 v v rt12 1.2v, 5% reset threshold v2 input threshold 1.104 1.122 1.140 v 1.2v, 7.5% reset threshold 1.074 1.092 1.110 v 1.2v, 10% reset threshold 1.044 1.062 1.080 v v rt10 1v, 5% reset threshold v2 input threshold 0.920 0.935 0.950 v 1v, 7.5% reset threshold 0.895 0.910 0.925 v 1v, 10% reset threshold 0.870 0.885 0.900 v consult ltc marketing for parts specified with wider operating temperature ranges. operating temperature range ltc2904c/ltc2905c ................................ 0 c to 70 c ltc2904i/ltc2905i ..............................40 c to 85 c storage temperature range ..................65 c to 150 c tsot lead temperature (soldering, 10 sec) ........ 300 c order part number ts8 part marking ltc2904cddb ltc2904iddb ltc2905cddb ltc2905iddb ltc2904cts8 ltc2904its8 ltc2905cts8 ltc2905its8 ltbcj ltbck ltajd ltaje top view ddb8 package 8-lead (3mm 2mm) plastic dfn exposed pad is gnd (pin 9), must be soldered to pcb 5 6 7 8 4 3 2 1 gnd rst rst/tmr* v2 tol s1 s2 v1 9 v2 1 rst/tmr* 2 rst 3 gnd 4 8 v1 7 s2 6 s1 5 tol top view ts8 package 8-lead plastic tsot-23 t jmax = 125 c, ja = 250 c/w * rst for ltc2904 tmr for ltc2905 * rst for ltc2904 tmr for ltc2905 order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/
ltc2904/ltc2905 3 29045fa electrical characteristics the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v1 = 2.5v, v2 = 1v, s1 = tol = v1, s2 = 0v, unless otherwise noted. (notes 2, 3) note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the greater of v1, v2 is the internal supply voltage (v cc ). note 3: all currents into pins are positive; all voltages are referenced to gnd unless otherwise noted. note 4: for reset thresholds test conditions refer to the voltage threshold programming table in the applications information section. note 5: the output pins rst and rst have an internal pull-up to v cc of typically ? a. however, an external pull-up resistor may be used when faster rise time is required or for v oh voltages greater than v cc . note 6: the input current to the three-state input pins are the pull-up and the pull-down current when the pins are either set to v1 or gnd respectively. in the open state, the maximum leakage current to v1 or gnd permissible is 10 a. symbol parameter conditions min typ max units v ccmin minimum internal operating voltage (note 2) rst in correct logic state 1v i v1 v1 input current includes input current to three-state pins 65 130 a i v2 v2 input current 0.4 1.0 a i tmr(up) tmr pull-up current (ltc2905) v tmr = 0v 1.5 2.1 2.7 a i tmr(down) tmr pull-down current (ltc2905) v tmr = 1.4v 1.5 2.1 2.7 a t rst reset time-out period (ltc2904) 140 200 260 ms t rst reset time-out period (ltc2905) c tmr = 22nf 140 200 260 ms t uv vx undervoltage detect to vx less than reset threshold v rtx 150 s rst or rst by more than 1% v ol output voltage low rst, rst i = 2.5ma 0.15 0.4 v i = 100 a; v1 = 1v (rst only) 0.05 0.3 v v oh output voltage high rst, rst i = ? a v cc ? v (notes 2, 5) three-state inputs s1, s2, tol v il low level input voltage 0.4 v v ih high level input voltage 1.4 v v z pin voltage when left in open state i = ?0 a 0.7 v i = 0 a 0.9 v i = 10 a 1.1 v i vpg programming input current (note 6) 25 a
ltc2904/ltc2905 4 29045fa temperature ( c) threshold voltage, v rt50 (v) 29045 g01 temperature ( c) temperature ( c) temperature ( c) temperature ( c) temperature ( c) temperature ( c) temperature ( c) temperature ( c) threshold voltage, v rt33 (v) 3.120 3.070 3.020 2.970 2.920 2.870 29045 g02 threshold voltage, v rt25 (v) 29045 g03 2.375 2.325 2.275 2.225 2.175 threshold voltage, v rt18 (v) 29045 g04 1.705 1.685 1.665 1.645 1.625 1.605 1.585 1.565 threshold voltage, v rt15 (v) 29045 g05 1.425 1.405 1.385 1.365 1.345 1.325 1.305 threshold voltage, v rt12 (v) 1.135 1.125 1.115 1.105 1.095 1.085 1.075 1.065 1.055 1.045 29045 g06 threshold voltage, v rt10 (v) 29045 g07 0.950 0.940 0.930 0.920 0.910 0.900 0.890 0.880 0.870 4.75 4.70 4.65 4.60 4.55 4.50 4.45 4.40 4.35 i v1 ( a) 21.5 21.0 20.5 20.0 19.5 19.0 29045 g08 i v2 ( a) 29045 g09 1.8 1.7 1.6 1.5 1.4 1.3 1.2 ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 5% 7.5% 10% 5% 7.5% 10% 5% 7.5% 10% 5% 7.5% 10% 5% 7.5% 10% 5% 7.5% 10% 5% 7.5% 10% v1 = 5v v2 = 3.3v s1 = s2 = tol = 1.4v v1 = 5v v2 = 3.3v s1 = s2 = tol = 1.4v 5v threshold voltage vs temperature 3.3v threshold voltage vs temperature 2.5v threshold voltage vs temperature 1.8v threshold voltage vs temperature 1.5v threshold voltage vs temperature 1.2v threshold voltage vs temperature 1v threshold voltage vs temperature i v1 vs temperature i v2 vs temperature typical perfor a ce characteristics uw specifications are at t a = 25 c unless otherwise noted.
ltc2904/ltc2905 5 29045fa temperature ( c) i v2 ( a) 29045 g10 20.0 19.5 19.0 18.5 18.0 17.5 17.0 comparator overdrive voltage (% of v rtx ) 0.1 typical transient duration ( s) 700 600 500 400 300 200 100 0 1 10 100 29045 g11 reset occurs above curve c tmr (farad) 10p 100p 1n 10n 100n 1 reset time out period, t rst (ms) 29045 g12 10000 1000 100 10 1 0.1 temperature ( c) reset time-out period, t rst (ms) 29045 g13 235 230 225 220 215 210 205 200 195 v1 (v) 0 rst output voltage (v) 5 4 3 2 1 0 ? 1234 29045 g14 5 v2 = s1 = s2 = tol = v1 10k pull-up resistor v1 (v) 0 rst output voltage (v) 5 4 3 2 1 0 ? 1234 29045 g15 5 v2 = s1 = s2 = tol = v1 10k pull-up resistor supply voltage, v cc (v) 0 rst pull-down current, i rst (ma) 5 4 3 2 1 0 4 29045 g17 123 5 rst at 150mv rst at 50mv v1 (v) 0 rst output voltage (v) 5 4 3 2 1 0 ? 1234 29045 g16 5 v2 = s1 = s2 = tol = v1 10pf capacitor at rst supply voltage, v cc (v) 0 rst pull-down current, i rst (ma) 5 4 3 2 1 0 4 29045 g18 123 5 rst at 150mv rst at 50mv s1 = v2 = v1 tol = s2 = gnd no pull-up r v2 = s1 = s2 = tol = v1 no pull-up r ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 crt = 22nf (film) v1 = 2.5v v2 = 3.3v s1 = s2 = tol = 1.4v typical perfor a ce characteristics uw i v2 vs temperature typical transient duration vs comparator overdrive (v1, v2) reset time out period (t rst ) vs capacitance (c tmr ) reset time-out period (t rst ) vs temperature rst output voltage vs v1 rst output voltage vs v1 rst output voltage vs v1 rst pull-down current (i rst ) vs supply voltage (v cc ) rst pull-down current (i rst ) vs supply voltage (v cc ) specifications are at t a = 25 c unless otherwise noted.
ltc2904/ltc2905 6 29045fa rst pull-down current, i rst (ma) 0 rst output voltage low, v ol (v) 20 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 29045 g19 10 50 60 40 30 supply voltage, v cc (v) 2.0 rst pull-up current, i rst ( a) 4.0 ?8 ?6 ?4 ?2 ?0 ? ? ? ? 0 29045 g21 3.0 5.0 2.5 4.5 3.5 supply voltage, v cc (v) 2.0 4.0 29045 g22 3.0 5.0 2.5 4.5 3.5 25 c 85 c ?0 c v1 = 5v v2 = 3v s1 = s2 = tol = v1 no pull-up r output source current, i rst ( a) ?2 rst output voltage high, v oh (v) 3.0 2.5 2.0 1.5 1.0 0.5 ?0 ? ? ? 29045 g23 ? 0 v1 = 3.3v v2 = 1.8v s1 = tol =v1 s2 = open no pull-up r 25 c 85 c ?0 c output source current, i rst ( a) ? rst output voltage high, v oh (v) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 ? ? ? 3 ? ? 29045 g24 ? 0 v1 = 3.3v v2 = 1.5v s1 = tol = v1 s2 = open no pull-up r 25 c 85 c temperature ( c) i s1 , i s2 , i tol ( a) 20 19 18 17 16 15 14 13 12 11 10 29045 g25 temperature ( c) i s1 , i s2 , i tol ( a) ?0 ?9 ?8 ?7 ?6 ?5 ?4 ?3 ?2 ?1 ?0 29045 g26 v rt25 v rt33 v rt50 tol = gnd rst pull-down current, i rst (ma) 0 rst output voltage low, v ol (v) 20 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 29045 g20 10 50 60 40 30 25 c 85 c ?0 c v1 = 5v v2 = 3.3v s1 = s2 = tol = v1 no pull-up r ?0 c rst pull-up current, i rst ( a) ?6 ?4 ?2 ?0 ? ? ? ? 0 tol = v1 v rt25 v rt33 v rt50 ?0 100 25 75 ?5 0 50 ?0 100 25 75 ?5 0 50 s1 = s2 = tol = 3.3v s1 = s2 = tol = gnd typical perfor a ce characteristics uw rst output voltage high (v oh ) vs rst output source current (i rst ) rst output voltage low (v ol ) vs rst pull-down current (i rst ) rst output voltage low (v ol ) vs rst pull-down current (i rst ) rst pull-up current (i rst ) vs supply voltage (v cc ) rst pull-up current (i rst ) vs supply voltage (v cc ) rst output voltage high (v oh ) vs rst output source current (i rst ) i s1 , i s2 , i tol vs temperature i s1 , i s2 , i tol vs temperature specifications are at t a = 25 c unless otherwise noted.
ltc2904/ltc2905 7 29045fa uu u pi fu ctio s (ts8 package/ddb8 package) v2 (pin 1/pin 4): voltage input 2. input for v2 monitor. select from 3.3v, 2.5v, 1.8v, 1.5v, 1.2v or 1.0v. refer to table 1 for details. the greater of v1, v2 is also the internal supply voltage, v cc . bypass this pin to ground with a 0.1 f (or greater) capacitor. rst (pin 2/pin 3): (ltc2904 only) reset logic output. when all voltage inputs are above the reset threshold for at least the programmed delay time, this pin pulls low. this pin has a weak pull-up to v cc and may be pulled above v cc using an external pull-up. tmr (pin 2/pin 3): (ltc2905 only) reset delay time programming pin. attach an external capacitor (c tmr ) to gnd to set a reset delay time of 9ms/nf. leaving the pin open generates a minimum delay of approximately 200 s. a 22nf capacitor will generate a 200ms reset delay time. rst (pin 3/pin 2): inverted reset logic output. pulls low when any voltage input is below the reset threshold and is held low for programmed delay time after all voltage inputs are above threshold. this pin has a weak pull-up to v cc and may be pulled above v cc using an external pull-up. gnd (pin 4/pin 1, pin 9): ground. tol (pin 5/pin 8): three-state input for supply tolerance selection (5%, 7.5% or 10%). see the applications infor- mation section for tolerance selection chart (table 2). s1 (pin 6/pin 7): voltage threshold select three-state input. connect to v1, gnd or leave unconnected in open state (see table 1). s2 (pin 7/pin 6): the second voltage threshold select three-state input. connect to v1, gnd or leave uncon- nected in open state (see table 1). v1 (pin 8/pin 5): voltage input 1. input for v1 monitor. select from 5v, 3.3v, or 2.5v. see table 1 for details. the greater of v1, v2 is also the internal supply voltage, v cc . bypass this pin to ground with a 0.1 f (or greater) capacitor. + + 200ms reset pulse generator three-state decoder resistor network power detect band gap reference v cc v cc ltc2904 2904 bd s1 tol s2 rst rst v cc gnd v1 v2 6 a 6 a block diagra w
ltc2904/ltc2905 8 29045fa v x rst rst t uv t rst 1v 1v v rtx 29045 td block diagra w ti i g diagra u ww + + reset pulse generator three-state decoder resistor network power detect band gap reference v cc v cc ltc2905 2905 bd s1 tol s2 tmr rst gnd v1 v2 6 a v x monitor timing
ltc2904/ltc2905 9 29045fa leakage current allowable from the pin to either gnd or v1 is 10 a. in margining applications, all the 3-state input pins can be driven using a tri-state buffer. note however the low and high output of the tri-state buffer has to satisfy the v il and v ih of the 3-state pin listed in the electrical characteristics table. moreover, when the tri-state buffer is in the high impedance state, the maximum leakage current allowed from the pin to either gnd or v1 is 10 a. monitor programming connecting s1 and s2 to gnd, v1 or leaving them open selects the ltc2904/ltc2905 input voltage combina- tions. table 1 shows the nine possible combinations of nominal input voltages and their corresponding s1, s2 connections. table 1. voltage threshold programming v1 v2 s1 s2 5.0 3.3 v1 v1 3.3 2.5 open gnd 3.3 1.8 v1 open 3.3 1.5 open v1 3.3 1.2 open open 2.5 1.8 gnd gnd 2.5 1.5 gnd open 2.5 1.2 gnd v1 2.5 1.0 v1 gnd note: open = open circuit or driven by a three state buffer in high impedance state with leakage current less than 10 a. tolerance programming the three-state input pin, tol programs the common supply tolerance for both v1 and v2 input voltages (5%, 7.5% or 10%). the larger the tolerance the lower the trip threshold. table 2 shows the tolerances selection corre- sponding to a particular connection at the tol pin. supply monitoring the ltc2904/ltc2905 are low power, high accuracy dual supply monitors with a common reset output and select- able thresholds. reset delay is set to a nominal of 200ms for the ltc2904 and is adjustable using an external capacitor for the ltc2905. the two three-state input pins (s1 and s2) select one of nine possible threshold voltage combinations. another three-state input pin sets the supply tolerance (5%, 7.5% or 10%). both input voltages (v1 and v2) must be above predetermined thresholds for the reset not to be invoked. the ltc2904/ltc2905 assert the reset outputs during power-up, power-down and brownout conditions on either of the voltage inputs. power-up the greater of v1, v2 is the internal supply voltage (v cc ). v cc powers the drive circuits for the rst pin. therefore as soon as v1 or v2 reaches 1v during power-up, the rst output asserts low. v cc also powers the drive circuits for the rst pin in the ltc2904. therefore, rst weakly pulls high when v1 or v2 reaches at least 1v. threshold programming is complete when v1 reaches at least 2.17v. after programming, if either v1 or v2 falls below its programmed threshold, rst asserts low (rst weakly pulls high) as long as v cc is at least 1v. once v1 and v2 rise above their thresholds, an internal timer is started. after the programmed delay time, rst weakly pulls high (rst asserts low). power-down on power-down, once either v1 or v2 inputs drops below its threshold, rst asserts logic low and rst weakly pulls high. v cc of at least 1v guarantees a logic low of 0.4v at rst. programming pins the three 3-state input pins: s1, s2 and tol should be connected to gnd, v1 or left unconnected during normal operation. note that when left unconnected, the maximum applicatio s i for atio wu u u table 2. tolerance programming tolerance tol 5% v1 7.5% open 10% gnd
ltc2904/ltc2905 10 29045fa threshold accuracy reset threshold accuracy is of the utmost importance in a supply sensitive system. ideally such a system should not reset while supply voltages are within a specified margin below the rated nominal level. both of the ltc2904/ ltc2905 inputs have the same relative threshold accu- racy. the specification for ltc2904/ltc2905 is 1.5% of the programmed nominal input voltage (over the full operating temperature range). for example, when the ltc2904/ltc2905 are programmed to handle a 5v input with 10% tolerance (s1 = s2 = v1 and tol = gnd, refer to table 1 and table 2), it does not issue a reset command when v1 is above 4.5v. the typical 10% trip threshold is at 11.5% below the nominal input voltage level. therefore, the typical trip threshold for the 5v input is 4.425v. with 1.5% accuracy, the trip threshold range is 4.425v 75mv over temperature (i.e. 10% to 13% below 5v). this implies that the monitored system must operate reliably down to 4.35v over temperature. the same system using a supervisor with only 2.5% accuracy needs to work reliably down to 4.25v (4.375v 125mv) or 15% below 5v, requiring the monitored system to work over a much wider operating voltage range. in any supervisory application, supply noise riding on the monitored dc voltage can cause spurious resets, particu- larly when the monitored voltage is near the reset thresh- old. a less desirable but common solution to this problem is to introduce hysteresis around the nominal threshold. notice however, this hysteresis introduces an error term in the threshold accuracy. therefore, a 2.5% accurate monitor with 1.0% hysteresis is equivalent to a 3.5% monitor with no hysteresis. the ltc2904/ltc2905 takes a different approach to solve this problem of supply noise causing spurious reset. the first line of defense against this spurious reset is a first order low pass filter at the output of the comparator. thus, the comparator output goes through a form of integration before triggering the output logic. therefore, any kind of transient at the input of the comparator needs to be of sufficient magnitude and duration before it can trigger a change in the output logic. the second line of defense is the programmed delay time t rst (200ms for ltc2904 and using an external capacitor for ltc2905). this delay will eliminate the effect of any supply noise whose frequency is above 1/t rst on the rst and rst output. when either v1 or v2 drops below its programmed threshold, the rst pin asserts low (rst weakly pulls high). then when the supply recovers above the pro- grammed threshold, the reset-pulse-generator timer starts counting. if the supply remains above the programmed threshold when the timer finishes counting, the rst pin weakly pulls high (rst asserts low). however, if the supply falls below the programmed threshold any time during the period when the timer is still counting, the timer resets and it starts fresh when the supply next rises above the pro- grammed threshold. note that this second line of defense is only effective for a rising supply and does not affect the sensitivity of the system to a falling supply. therefore, the first line of defense that works for both cases of rising and falling is necessary. these two approaches prevent spurious reset caused by supply noise without sacrificing the threshold accuracy. selecting the reset timing capacitor the reset time-out period for ltc2905 is adjustable in order to accommodate a variety of microprocessor appli- cations. connecting a capacitor, c tmr , between the tmr pin and ground sets the reset time-out period, t rst . the following formula determines the value of capacitor needed for a particular reset time-out period: c tmr = t rst ?110 ?10 ? [f/s] for example, using a standard capacitor value of 22nf would give a 22000/110 = 200ms delay. applicatio s i for atio wu uu
ltc2904/ltc2905 11 29045fa figure 1 shows the desired delay time as a function of the value of the timer capacitor that should be used: as noted in the power-up and power-down sections the circuits that drive rst and rst are powered by v cc . during fault condition, v cc of at least 1v guarantees a maximum v ol = 0.4v at rst. however, at v cc = 1v the weak pull-up current on rst is barely turned on. there- fore, an external pull-up resistor of no more than 100k is recommended on the rst pin if the state and pull-up strength of the rst pin is crucial at very low v cc . note however, by adding an external pull-up resistor, the pull-up strength on the rst pin is increased. therefore, if it is connected in a wired-or connection, the pull-down strength of any single device needs to accommodate this additional pull-up strength. output rise and fall time estimation the rst and rst outputs have strong pull-down capabil- ity. the following formula estimates the output fall time (90% to 10%) for a particular external load capacitance (c load ): t fall 2.2 ?r pd ?c load where r pd is the on-resistance of the internal pull-down transistor estimated to be typically 40 ? at room tempera- ture (25 c) and c load is the external load capacitance on the pin. assuming a 150pf load capacitance, the fall time is about 13ns. the rise time, on the rst and rst pins is limited by weak internal pull-up current sources to v cc . the following formula estimates the output rise time (10% to 90%) at the rst and rst pins: t rise 2.2 r pu ?c load where r pu is the on-resistance of the pull-up transistor. notice that this pull-up transistor is modeled as a 6 a current source in the block diagram as a typical represen- tation. the on-resistance as a function of the v cc = max (v1, v2) voltage (for v cc > 1v) at room temperature is estimated as figure 1. reset time-out period vs capacitance leaving the tmr pin open with no external capacitor generates a reset time-out of approximately 200 s. for long reset time-out, the only limitation is the availability of large value capacitor with low leakage. the tmr capacitor will never charge if the leakage current exceeds the mini- mum tmr charging current of 2.1 a (typical). rst and rst output characteristics the dc characteristics of the rst and rst pull-up and pull-down strength are shown in the typical performance characteristics section. both rst and rst have a weak internal pull-up to v cc = max (v1, v2) and a strong pull- down to ground. the weak pull-up and strong pull-down arrangement allow these two pins to have open-drain behavior while possess- ing several other beneficial characteristics. the weak pull-ups eliminate the need for external pull-up resistors when the rise time on these pins is not critical. on the other hand, the open-drain rst configuration allows for wired-or connections and can be useful when more than one signal needs to pull down on the rst line. applicatio s i for atio wu uu c tmr (farad) 10p 100p 1n 10n 100n 1 reset time out period, t rst (ms) 29045 f01 10000 1000 100 10 1 0.1
ltc2904/ltc2905 12 29045fa 2.5v, 1.2v supply monitor, 10% tolerance 3.3v, 1.2v dual supply monitor with led power good indicator, 7.5% tolerance and adjustable timer typical applicatio s u v2 rst rst gnd v1 s2 s1 tol ltc2904 2.5v 1.2v 0.1 f 0.1 f system reset 2904 ta02 v2 s2 s1 gnd v1 rst rst tol ltc2904 3.3v 1.2v 0.1 f 0.1 f 2905 ta03 510 ? led system reset applicatio s i for atio wu uu follow: r max v v v pu = ? 610 12 1 5 (, ) at v cc = 3.3v, r pu is about 260k. using 150pf for load capacitance, the rise time is 86 s. an external pull-up resistor may be used if the output needs to pull up faster and/or to a higher voltage, for example: the rise time reduces to 3.3 s for a 150pf load capacitance, when using a 10k pull-up resistor.
ltc2904/ltc2905 13 29045fa 3.3v, 1.2v dual supply monitor with asymmetric hysteresis, 5% tolerance (supplies rising), 10% tolerance (after rst goes low) v2 s2 s1 gnd v1 rst tol rst ltc2904 3.3v 1.2v 0.1 f 0.1 f system reset 2904 ta04 10k typical applicatio s u v1 s1 s2 tol v2 tmr gnd rst ltc2905 0.1 f 22nf 0.1 f 29045 ta06 v in supply controller three-state dc/dc converter system logic 5v 3.3v 5v, 3.3v dual supply monitor with voltage margining for automated on-board testing
ltc2904/ltc2905 14 29045fa ddb package 8-lead plastic dfn (3mm 2mm) (reference ltc dwg # 05-08-1702) u package descriptio 2.00 0.10 (2 sides) note: 1. drawing conforms to version (wecd-1) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 0.10 bottom view?xposed pad 0.56 0.05 (2 sides) 0.75 0.05 r = 0.115 typ 2.15 0.05 (2 sides) 3.00 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0 ?0.05 (ddb8) dfn 1103 0.25 0.05 2.20 0.05 (2 sides) recommended solder pad pitch and dimensions 0.61 0.05 (2 sides) 1.15 0.05 0.675 0.05 2.50 0.05 package outline 0.25 0.05 0.50 bsc pin 1 chamfer of exposed pad 0.50 bsc
ltc2904/ltc2905 15 29045fa 1.50 ?1.75 (note 4) 2.80 bsc 0.22 ?0.36 8 plcs (note 3) datum ? 0.09 ?0.20 (note 3) ts8 tsot-23 0802 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 ?0.90 1.00 max 0.01 ?0.10 0.20 bsc 0.30 ?0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.52 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637) u package descriptio information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
ltc2904/ltc2905 16 29045fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2003 lt/lt 0905 rev a ? printed in usa related parts typical applicatio u part number description comments ltc690 5v supply monitor, watchdog timer and battery backup 4.65v threshold ltc694-3.3 3.3v supply monitor, watchdog timer and battery backup 2.9v threshold ltc699 5v supply monitor and watchdog timer 4.65v threshold ltc1232 5v supply monitor, watchdog timer and push-button reset 4.37v/4.62v threshold ltc1326/ltc1326-2.5 micropower precision triple supply monitor 4.725v, 3.118v, 1v threshold ( 0.75%) for 5v/2.5v, 3.3v and adj ltc1536 precision triple supply monitor for pci applications meets pci t fail timing specifications ltc1726-2.5/ltc1726-5 micropower triple supply monitor for 2.5v/5v, 3.3v and adj adjustable reset and watchdog time-outs ltc1727-2.5/ltc1727-5 micropower triple supply monitor with open-drain reset individual monitor outputs in msop ltc1728-1.8/ltc1728-3.3 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc1728-2.5/ltc1728-5 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc1985-1.8 micropower triple supply monitor with push-pull reset output 5-lead sot-23 package ltc2900 programmable quad supply monitor adjustable reset, 10-lead msop, dfn packages ltc2901 programmable quad supply monitor adjustable reset and watchdog timer, 16-lead ssop package ltc2902 programmable quad supply monitor selectable tolerance, reset disable for margining functions, 16-lead ssop package ltc2903-1 precision quad supply monitor ultra low voltage reset, 6-lead sot-23 package ltc2906 dual supply monitor with one pin-selectable threshold and 0.5v adjustable threshold and three supply one adjustable input tolerances, 8-lead sot-23 and dfn packages ltc2907 dual supply monitor with one pin-selectable threshold and 0.5v adjustable threshold, adjustable reset timer one adjustable input and three supply tolerances, 8-lead sot-23 and dfn packages ltc2908 precision six supply monitors ultra low voltage reset, 8-lead sot-23 and dfn packages v2 tmr s2 s1 gnd v1 tol rst ltc2905 v2 tmr gnd rst v1 tol s2 s1 ltc2905 3.3v 2.5v 1.8v 1.2v 0.1 f 0.1 f 0.1 f 0.1 f 2905 ta05 22nf 22nf 510 ? led quad supply monitor with led undervoltage indicator, 5% tolerance, 3.3v, 2.5v, 1.8v, 1.2v

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